This invention relates to image sensors such as CCD imagers, and more particularly relates to structures for controlling charge blooming in an image sensor.
The charge-coupled-device (CCD) imager, a common image sensor configuration, typically consists of an array of isolated channels in a semiconductor substrate. In operation of a conventional n-type channel CCD imager, exposure of the substrate, here p-type, to illumination from a scene to be imaged results in photogeneration of electrons in the substrate and collection of the electrons in packets in the channels. Distinct pixel regions of collected electron packets along the channels are controlled by application of appropriate voltages to gate electrodes provided on the substrate surface over the channel pixel regions. An image of a scene is thus produced by collection of pixel electron packets in response to scene illumination and timed transfer of the electron packets from the channels to electronics configured for sensing each pixel's accumulated charge packet level.
Each pixel region along a channel has a finite charge storage capacity; that is, there is a definable maximum amount of photogenerated charge that can be accumulated in a given pixel region during an illumination period. This pixel capacity is defined by geometric, impurity doping, biasing, and other characteristics of the channel. Due to this limitation, high-intensity illumination conditions in the region of a given pixel can produce a level of photogenerated charge that exceeds the charge storage capacity of that pixel.
To illustrate this condition, and referring to FIG. 1A, there is shown a high-intensity illumination spot 10 on a selected pixel region, defined by a corresponding gate electrode 12, over a location of a CCD channel 14, which can be formed as a surface channel or a buried channel, in the conventional manner. The channel 14 consists of, e.g., an n-type region defined between channel stops 16, 18, of opposite conductivity type, i.e., p-type regions. When the accumulated photogenerated charge under the gate electrode 12 exceeds the storage capacity of that pixel region, the charge packet 20 spreads, or “blooms” to neighboring pixel regions under gate electrodes 22, 24, 26, 28 and so on along the channel. The blooming charge corrupts the neighboring pixels' charge level correspondence to local illumination intensity and can saturate one pixel or a region of pixels. In severe cases the blooming charge can flood a substantial fraction of imager pixels and obscure a major potion of a scene to be imaged.
The charge blooming phenomenon is cosmetically objectionable for broadcast television and other such commercial applications, and scene lighting is typically controlled in such applications to minimize blooming conditions. But for many scientific and military applications, the brightness range of a scene being imaged is not generally controllable. Indeed, in many astronomy and space surveillance applications, the range of brightness of stars and other illuminated objects can be so large that imager blooming conditions are inevitable, resulting in the danger of regions of interest in the scene being obscured during a critical scene monitoring operation.
A range of integrated structures have been proposed and demonstrated for providing blooming control in an image sensor such as a CCD imager. The operation of one class of blooming control structures, namely, a lateral blooming control structure, such as that described by, e.g., Savoye et al., in “High sensitivity charge-coupled device (CCD) imagers for television,” SPIE V. 501, pp. 32–39, 1984, is illustrated in FIG. 1B. Here a CCD channel 14, e.g., an n-type buried channel, is flanked on each side by a blooming control structure consisting of a blooming drain 30 (and 36) and blooming barrier regions 32, 34 (and 38, 40). The impurity doping of the blooming drain and barrier regions, and the voltage, VBD, applied to the blooming drain region are all selected such that for a given voltage, VG, applied to the gate 12 of a pixel at which a high-intensity illumination spot 10 is located, charge in excess of the pixel capacity, i.e., blooming charge 20, will preferentially flow to the blooming drains 30, 36, rather than to neighboring pixel regions. The excess charge in the blooming drains is dumped to a location away from the buried channel pixel regions, e.g., at the periphery of the imager.
In the manner of a MOSFET, the channel with its reservoir of accumulated charge is here an electron source, the blooming drain is a drain, and the pixel gate electrode is a transistor gate. The blooming barrier region in this scenario is the transistor channel. The threshold voltage of this MOSFET-like configuration depends on the bias of the source, drain, and gate terminals, and the electrical characteristics of the blooming barrier region. Specifically, for a given bias, the blooming barrier region sets the electrical potential at which charge from the pixel region can flow to the blooming drain region, and the blooming barrier region therefore sets the charge capacity of the pixel.
For many applications precise control of the pixel charge capacity as set by the blooming potential barrier is imperative. An important and common concern is the relative potential energies of the blooming barrier height and of substrate surface states. The filling of surface states with charge from a pixel region can cause the known residual image effect, in which surface state charge may not completely empty from the surface states as quickly as does the other accumulated charge in the pixel region, resulting in the residual addition of this charge to charge packets collected in the pixel at later times. It is preferred that the potential barrier height be higher than the potential energy level of the surface states to minimize the filling of those states. Generally, to avoid surface-state trapping the charge-packet potential, and thus the potential barrier, should be at least 10 kT higher than the potential at the surface.
The potential barrier of the blooming barrier region is a critical function of both the doping concentration distribution and the lateral width, or extent, of the doping distribution in the barrier region between the channel and the blooming drain. The doping concentration distribution impacts the potential barrier height directly, and the geometric extent of the barrier region can indirectly impact the barrier height as a result of the known short-channel effect. The short-channel effect, named for the phenomenon in which the drain voltage of a transistor affects the transistor threshold voltage, occurs when the blooming barrier region is relatively narrow. With a relatively narrow blooming barrier region, the potential barrier, and pixel charge capacity, can be modulated by changes in the bias applied to the blooming drain. This control enables fine tuning of the barrier height to precisely define the pixel charge capacity and is desirable for many imaging applications where, e.g., the optimum charge storage capacity of a pixel can change over time. Fine tuning of the blooming barrier height is also desirable for compensation of imager variation across an imager production run. For example, in a CCD camera mass production operation, the characteristic CCD gate threshold voltage can vary from CCD chip to chip, requiring the fine tuning of CCD clock voltages, of which there may be several, on each chip to optimally set the blooming control on that chip. Fine tuning of the blooming control level by control of the blooming drain voltage, instead of the multiple clock voltages, is more efficient and more controllable.
There have been developed a number of techniques for producing a lateral blooming control structure like that of FIG. 1B to control the potential barrier height and charge capacity limit set by a blooming barrier region. For example, Wallace in U.S. Pat. No. 4,362,575; Wallace in U.S. Pat. No. 4,579,626; and Savoye et al. in U.S. Pat. No. 4,658,497, all describe fabrication processes in which first the blooming drain is formed by vertical ion implantation of a suitable dopant through an opening in two masking layers and then the blooming barrier region is formed by vertical ion implantation of a suitable dopant through the opening after the opening is enlarged and the top masking layer removed. Walls of the enlarged opening may be tapered to correspondingly taper the stopping power effect of the masking layer at the edges of the opening.
Dyck et al. in U.S. Pat. Nos. 4,593,303; and 5,118,631; describe a fabrication process in which the blooming drain is formed by vertical ion implantation of a suitable dopant through an opening, here in a single masking layer. The blooming barrier region is then formed by vertical ion implantation of a suitable dopant through the same opening, after which the dopant is diffused, during a high-temperature step, isotropically beyond the drain region in the substrate.
The Wallace and Savoye processes, requiring two masking layers and two mask etch steps in formation of the blooming control structure, are somewhat limited in their range and attainable precision of the resulting structure geometry. The precision of the two mask opening etch steps determines the lateral width of the blooming barrier and the dopant distribution at the edge of the barrier, and given a wet etch of a lower masking layer consisting of oxide, as suggested, very precise control of these factors is not guaranteed. In addition, these multi-step etch processes require a high degree of process control to achieve reproducibility. Any variation in enlargement of the masking layer opening, and any variation in the opening wall profile, can severely impact characteristics of the blooming barrier region from one fabrication sequence to the next.
Similarly, the Dyck process, by employing a thermal diffusion step to define the barrier region width, does not enable high-precision in impurity dopant distribution control, specifically, e.g., because the dopant may segregate to any dielectric layer on the substrate surface during the diffusion step. The Dyck process also does not provide flexibility in precisely distributing the dopant, due to the inherently isotropic nature of the diffusion step. In addition, the Dyck high-temperature diffusion step is not optimal for current fabrication processes, due to the increased thermal stress it can place on the substrate, and due to a possible conflict with the diffusion extent of other impurity dopant regions in the device.
These examples highlight the limitations in flexibility and precision of impurity dopant distribution typical of conventional processes for forming blooming control structures. Such limitations are found to correspondingly limit the operational characteristics of image sensors in which the structures are implemented.